Validation Engineer Location: Hyderabad Job Description: Good knowledge of Vivado, HDL Familiar with Vitis. Having C knowledge and experience in building BareMetal application is big +ve Job Requirement: Should be able to build IPI based system Should be able to…
DV(DFT) Location: Bangalore Job Description: Develop testbench using System Verilog/UVM based on test plan Run full chip level DFT tests with both RTL and netlist Debug any simulation failures Familiarity with System Verilog/VCS/Verdi/DVE Familiarity with JTAG/P1500 Scripting skills: Python/Perl Knowledge…
DV(High Speed Protocol) Location: Bangalore Job Description: PCIE/DDR/LPDDR/CXL/UCIE/Ethernet are good to have protocols, Arm experience, GLS Initial work at subsystem level followed by SoC level execution Expertise on Ethernet protocol/Expertise on packet processing in networking data path. High speed ethernet…
DV(GLS) Location: Bangalore Job Description: Design Verification and RTL/GLS debug Regression Run , Assertion and Coverage Closure activities Need to be good in SV/UVM Experience (years) : 3+ years Education Qualification: BE/ME
FPGA Location: Hyderabad Job Description: Exp on Video domain IPs / Digital IPs. Exp of one or more of protocols at the IP level: MIPI CSI / MIPI DSI / DisplayPort /HDMI / SDI. Job Requirement: Hands on experience with…
FPGA Location: Hyderabad Job Description: Responsibilities include packing RTL files into IP using AMD packaging methodology Excellent TCL and PERL/Python concepts and experience in Verilog / System Verilog design and verification. Working knowledge of UNIX environment desired. Job Requirement: Expertise…
DV (DDR) Location: Noida Job Description: Standard DV profile with DDRSS/Cache Controller knowledge as an added advantage, SV – UVM, DDR protocol and experience and Cache memory Experience (years) : 3+ years Education Qualification: BE/ME
DV(SOC) Location: Noida Job Description: SOC verification, GLS and low power SoC Level verification experience of atleast 1 SoC UVM, System Verilog, VCS exposure Understanding SoC concepts like pinmux/memory map Experience (years) : 4+ years Education Qualification: BE/ME
Design Verification Engineers Location: Noida Job Description: SOC Verification engineers with 3+ years of experience Knowledge of ARM architecture, CPU fundamentals & Cache coherency Experience with C/C++, assembly, and scripting languages. Familiarity with low power design and verification Develop CDV…
DV(SOC) Location: Bangalore Job Description: Verification engineer with a knowledge of SoC integration verification, SoC scenario verification, SoC performance verification, CHI/DDRx/LPDDRx/AI accelarator integration verification in SoC RTL. Your key responsibilities will include writing test plans, defining test methodologies, developing C…
PDK Physical Verification engineer Location: Bangalore Job Description: 8+ years of DRC/LVS development and support experience required. Exceptions made for the right candidates. Good knowledge of CMOS fundamentals with background in electrical engineering or semiconductor physics Good basic understanding of…
Analog Layout Location: Bangalore / Hyderabad Job Description: TSMC 16/12nm,7nm,5nm,3nm and below (other foundries are also fine like Intel, Samsung, GF). Preferably TSMC 5nm/3nm experience. Responsible for Design and development of critical analog, mixed signal, custom digital block and full…
Analog Circuit Design Location: Bangalore / Hyderabad Job Description: High speed DDR IO Circuit Design JD: (Experience level 2 year to 6year) Strong fundamental in Circuit design. Knowledge of finfet. Work experience in high speed transreceiver, Prior work experience in…
Memory Layout Location: Bangalore Job Description: 3 8 years of experience in Memory/Custom Layout design. Memory Leafcell layout library design from scratch including top level integration. Good knowledge on different types of memory architectures. Good knowledge in optimized layout design…
Multimedia Validation Location: Bangalore Job Description: Strong Experience on programming in C Experience on executing tests on Emulation/FPGA platforms like Zebu, Palladium and/or Silicon Experience on system debug, embedded operating systems, or bare metal programming Job Requirement: Experience on JTAG…
Functional Validation with Python scripting Location: Bangalore Job Description: Good at SoC topics Reset concepts Clock concepts Multiple COM protocols Python scripting Strong in C and C++, linkers, memory organization, resource partition and handling Added advantage of Perspec(Cadence Flow) Good…
Functional Validation Location: Bangalore Job Description: Strong Experience on programming in C Experience on system debug, embedded operating systems, or bare metal programming ARM CPU architecture knowledge Pre Silicon(Emulation) , Post Silicon experience Job Requirement: Experience on JTAG debuggers (e.g.,…
ATE Location: Bangalore Job Description: Design, develop, and implement ATE solutions to automate testing for new and existing products Create test plans, procedures, and test cases based on product specifications and requirements. Write test software scripts using languages such as…
DFT Location: Bangalore Job Description: Hands on experience in Tessent DFT RTL insertion, DRC checks and debug is a must. Hands on experience on Scan Insertion, ATPG, GLS debug, MBIST pattern generation and validation. Working knowledge of timing enabled GLS…
Design Verification Engineers Location: Bangalore Job Description: Working experience in IP/SoC/Subsystem/verification Strong understanding of computer architecture and ASIC design flow Experience in UVM Experience in Verilog and System Verilog languages Experience with PCIe/DDR/USB/Ethernet/CXL/HDMI/MIPI/DSI/CS/GLS/CPU Verification Experience with hands on IP integrations…
Clocks Validation Location: Bangalore Job Description: Collaborate with design and architecture teams to understand SoC design and create validation plan to uncover Si issues Develop and maintain firmware for SoC for functional bring up and validation Debug Silicon issues in…
STA Location: Bangalore Job Description: At least 4 5years of actual industry experience. Good Experience with writing constraints. Analyzing timing reports. Basic scripting knowledge. Basic understanding of RTL. Experience with PT(Primetime) and can write DC/PT timing constraints. Collaborate with physical…
IO Layout Location: Bangalore Job Description: Very Good Knowledge on GPIO layouts and performing Layout verifications. Good Exposure to Technologies of GF 55nm , UMC 55nm , TSMC 28nm, TSMC 12nm etc. Should have Solid experience in Layout design and…
IR Drop Location: Bangalore Job Description: We are seeking an experienced IR & EM Technology Expert to join our Flow Development Team. The successful candidate will have a strong background in CAD design and a deep understanding of IR &…
PV Location: Bangalore Job Description: Will be responsible for Runing Physical verification analysis for multiple designs, analyzing results and providing fixes to address the issues for complex cpu designs, in latest technology nodes. n (LVS, DRC, ERC, PERC, Antenna, DFM)…
RTL Design Location: Bangalore Job Description: Must have expertise on processor based SoC design which includes (but not limited to), ARM processor, DMAs, power/clock/reset controllers, interfaces like USB/SDIO/PCIe/SPI/UART Must have good understanding of high speed interfaces like USB, SDIO, PCIe…
RTL Microarchitecture Location: Bangalore Job Description: Strong understanding of the design convergence cycle, including architecture, micro architecture, Verification, Synthesis and timing closure. Expertise in managing IP dependencies, as well as planning front end design tasks. Design and development of high…
NOC Design(RTL Design) Location: Bangalore Job Description: Expert knowledge in NoC microarchitecture, configuration integration in multi clock, multi power domains based SoCs Extensive working knowledge of AXI, AHB, APB bus protocols Expert knowledge in RTL quality check tools like Lint,…
PD Location: Bangalore Job Description: Should have worked on the entire PD Flow from netlist to GDS (Floorplanning, Power Planning, Placement & Optimization, CTS, Routing, ECO steps, Timing/SI) Should have very good idea about OCV/MM/MC and multi power designs (Level…
Synthesis Location: Bangalore Job Description: Power team, the engineer will be responsible for RTL power optimization, netlist power analysis, and optimization on novel machine learning and visual processor chips in advanced nodes. 1–3 years of relevant experience Good understanding of…
Multimedia Validation Location: Bangalore Job Description: Mandatory Skills: strong embedded system – c programming ; Performance validation; operating system Looking for candidates with strong embedded systems experience, understanding of operating systems, programming languages like C, and multimedia related experience. Candidates…
PMIC Char Location: Bangalore Job Description: Provide post silicon validation support, drive interactions with Design, Test, Product Quality Engineering to resolve product issues. Perform silicon evaluation at chip/board level and document errata to support necessary device modifications. Proficient in design…
AMS Verification Location: Bangalore Job Description: Experience on verifying PMICs or Mixed Signal products. Lead verification of analog and mixed signal blocks, including but not limited to bandgaps, LDOs, Buck multi phase switching regulators, comparators, and FuSa monitoring circuits. Own…
CPU Validation Location: Bangalore Job Description: Strong programming skills in C and scripting expertise in Python for automation and tool development Proven experience in automation framework or toolchain development for validation environments Hands on experience in functional validation, including post…
Functional Validation Location: Bangalore Job Description: Validation engineer in mixed signal platform Develop and execute tests for battery management system validation for given requirements. Analyse the requirements/test plan and prepare test execution plan with setup and instruments. Perform power measurements…
PD Location: Hyderabad Job Description: Responsible for supporting Place and Route flows for various designs at 6nm, 4nm and 3nm technology nodes Tool versions qualification & deployment of new features into the flow Updating existing flows for new capabilities as…
Verification Location: Hyderabad Job Description: Must have good knowledge on the verification flows Excellent hands on debug skills and problem solving attitude. Experience of working in complex test bench/model in Verilog, System Verilog or SystemC Experience of working on Functional…