Job Description

STA


Location: Bangalore


:


At least 4-5years of actual industry experience. Good Experience with writing constraints. Analyzing timing reports. Basic scripting knowledge. Basic understanding of RTL. Experience with PT(Primetime) and can write DC/PT timing constraints. Collaborate with physical design and synthesis teams to resolve timing violations. Analyze timing paths and optimize for setup, hold, and clock skew issues. Work on multi-voltage domains and low-power design techniques (e.g., UPF). Support timing signoff and tape-out activities.

Job Requirement:


Strong understanding of STA fundamentals and timing closure methodologies. Proficiency in tools like PrimeTime, Tempus, Tweaker, Timevision, Fishtail. Experience with scripting languages (TCL, Perl, Python) for automation. Familiarity with advanced nodes (e.g., 7nm, 5nm, FinFET). Good grasp of physical design flow and constraints management. Ability to debug timing issues and propose effective solutions.

Experience (years) : 4+ years


Education Qualification:


BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent