Job Description

Design Verification Engineers


Location: Bangalore


:


Working experience in IP/SoC/Subsystem/verification Strong understanding of computer architecture and ASIC design flow Experience in UVM Experience in Verilog and System Verilog languages Experience with PCIe/DDR/USB/Ethernet/CXL/HDMI/MIPI/DSI/CS/GLS/CPU Verification Experience with hands on IP integrations into SOC is a plus Excellent debug skills. Experience in assembly language or C is a plus Familiar with scripting (Python/Perl/Shell) Experience with assertion-based design strategies, code coverage, functional coverage and test plan development. Should have excellent communication skills (both written and oral) Strong problem-solving skills




Job Requirement:


Bachelor's or Master's in EE/CS or related field 5+ years of SoC in ASIC/FPGA verification experience Proficiency in SV and UVM Strong debugging and problem-solving skills


Experience (years) : 5+ years


Education Qualification:


BTECH/MTECH in Electrical/Electronics/Computer Science Engineering or Equivalent