Principal Engineer Chip DFT Lead Renesas TS, IN Dec 02, 2025

Job Description We are seeking a highly skilled Principal Engineer - DFT Lead to drive Design for Test (DFT) strategy and implementation…

Principal Engineer Chiplet Architect Renesas TS, IN Dec 02, 2025

Job Description Define and drive Architecture of the chiplets optimized for MCU constraints Define and drive Architecture of the D2D interface IPs…

Principal Engineer SOC Architect Renesas TS, IN Dec 02, 2025

Job Description Drive Architecture that will define the SOC/MCU architecture and detailed technical specifications from product requirements provided by business and product…

Principal Engineer SoC Verification Lead Renesas TS, IN Dec 02, 2025

Job Description Lead verification of power efficient IPs, Chiplets and Chips to meet functional and performance targets. Actively manage the verification and…