Agiliad

Requisition ID 9830 Posted 05/30/2025 Job Title: FPGA Design Engineer Location: Pune Experience level: 4 6 Years Responsibilities and Skills: In depth knowledge with VHDL/Verilog/System Verilog, RTL design, FPGA design, and FPGA design tools. Knowledgeable about FPGA architecture. Complete FPGA…

Requisition ID 9824 Posted 04/21/2025 Engineering Manager: Job Duties: Lead, mentor, and inspire a team of engineers, fostering a culture of collaboration, creativity, and continuous improvement. Provide guidance and support to team members, facilitating their professional development and growth. Oversee…