Chip Lead

Year Bangalore, Karnataka, India

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Master/Bachelor's Degree in Electrical/Electronic Engineering
Senior SoC Architects, ASIC designers and Design Leads with experiences in all aspects of RTL design flow from Specification/Micro-architecture definition to design and verification, Timing Analysis, DFT and Implementation.
Experience 15-20 Years in SOC design with successful delivery of production quality chips
Should have a firm understanding of Chip Assembly, RTL Design, IP Design, SoC Integration and Implementation.
Familiarity with Computer architecture: knowledge of microprocessors, bus protocols.
Strong domain knowledge of Clocking, System modes, Power management, debug, interconnect, safety, security and other architectures
Know-how of Serial Interfaces, Multimedia, External Bus Interfaces, ISO26262 based functional safety relevant microprocessor architectures is preferred.
Self-motivated and ability to influence teams located globally without direct control
Excellent written and verbal communication skill with ability to identify potential issues in a timely manner and come up with viable action plans to address the same.
Creative problem-solving skills, logic analysis skills, ability to logically break complex problems down to manageable components
Should be a team player and willing to work with cross functional teams.
Mentor engineers across various functions

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