and Requirements
At Synopsys, we're at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we're powering it all with the world's most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon IP business is all about integrating more capabilities into an SoC-faster. We offer the world's broadest portfolio of silicon IP-predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.
As a Logic Library Applications engineer, you will be part of a team of engineers that use place and route & other techniques to demonstrate the competitiveness of Synopsys DesignWare Logic Libraries to potential customers.
This is a great position for an engineer that is competitive and loves a challenge. You will learn how to optimize design PPA through logic library cell selection and place and route methodologies, using tools such as Synopsys Fusion Compiler and PrimeTime. You will work with the most advanced semiconductor technology nodes from all the major foundries in the world on many designs with different PPA tradeoffs and present your results to customers to show them why they should purchase our products.
Your responsibilities will include:
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