Job Description

Responsibilities: Responsible for the development and implementation of System Design Solutions using Synopsys EDA tools and IP to solve customer problems as part of a service project team. Demonstrates expertise in at least one service line area (which include RTL Design & Verification, Physical Design, Design for Test and SoC Design from spec to post-silicon bring-up). Contributes to both turnkey projects and as a trusted advisor to customer design and CAD teams. Develops innovative solutions to problems with little guidance and implements them independently. Sets task-level goals and consistently meets schedules. Works with other Synopsys teams including BU AEs and Sales to develop, broaden and deploy Tool and IP solutions. Requirements: Typically requires a minimum of 2 years of related experience. Usually developing professional expertise,and may apply company policies and procedures to resolve a variety of issues. At a minimum, has working knowledge of work area and general proficiency with tools, systems, and procedures required to accomplish the job. Exercises judgment to determine appropriate action. Implementations and solutions are reviewed for accuracy and overall adequacy. Builds productive internal/external working relationships. Candidate would be responsible to perform Block/SoC Level EMIR analysis that includes static, dynamic, vectorless, vectored analysis. Provide feedback to Block PD owner regarding IR fixes, Signal EM, Power EM. Perform trials to validate EMIR fixes and convergence of the design. Requires in-depth focus, analysis, proactive working with PD, STA and DFT teams to co-ordinate and finalize on design closure. Candidate will be able to perform In-Rush current analysis to validate low power design ramp up and power-sequencing.

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