Job Description

About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers' current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform--for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for PCIe, CXL and interconnect protocols to craft creative next generation CXL and PCIe interface solutions for industry's most complex semiconductor chips. If you're creative and autonomous, we want to hear from you! At Marvell, you will have the opportunity to shape some of the most incredible products to address the needs of the next generation datacenters.

Job Responsibilities:

• Bachelor's degree in Computer Science, Electrical Engineering or related fields and 15+ years of related professional experience.
• Master's degree in Computer Science, Electrical Engineering or related fields with 10-12 years of experience.
• PhD in Computer Science, Electrical Engineering or related fields with 8-10 years of experience.
• Strong Architecture Definition and implementation skills in Interconnects, preferably PCIe and/or CXL
• Prior experience of architecting and designing complex design blocks handling and managing multi clock domains
• Prior experience of architecting and designing latency and bandwidth critical interconnect block
• Prior experience of porting complex design blocks across various technologies (FPGA & ASIC)

Requirements:

• Lead design team on implementation of CXL and PCIe controller architectural enhancements meeting future product goals within the organization
• Drive implementation of architectural blocks working with team members
• Work with Internal and External PHY teams to ensure interoperability
• Drive standard compliance certification for CXL and PCIe controllers
• Participate and contribute in CXL and PCI standard consortiums on future enhancements

The Perks

With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

Your Future

Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.