Senior Staff Engineer Elect Design
Year Bangalore, Karnataka, India
Job Description
Location: Bangalore
Job ID: 372849
Job description
- Candidate will be leading/involved in definition, verification architecture and development of constraint-random verification environment from scratch at both sub-system and standalone IP level. Candidate will develop expertise in multiple areas of verification - RTL and Power aware simulations and drive verification closure on complex modules using SV/UVM based methodology.
1. Good understanding of ASIC logic verification concepts and techniques.
2. Ability to develop verification architecture documents for complex modules/systems.
3. Ability to architect complex module / sub system / Full chip test benches and build verification infrastructure.
Your profile
Very good knowledge of Verilog/System Verilog and UVM.
Should be a good mentor and guide for junior engineers in the team.
Candidate should have worked on IP verification - component building, Assertion coding, CRV environment
Prior hands on experience on IPs with ARM CM0/CM0_/CM3/CM4/CM7/CM33/ Any Core AHB/AXI protocols is preferred.
Exposure to deployment of automation, power aware or GLS is added quality. Part of your life. Part of tomorrow.
Infineon is a world leader in semiconductor solutions that make life easier, safer, and greener. Our solutions for efficient energy management, smart mobility, and secure, seamless communications link the real and the digital world.
Does this sound like just the right challenge for you? If so, we look forward to getting to know you!
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Job Detail
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Job IdJD2965676
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IndustryNot mentioned
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Total Positions1
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Job Type:Full Time
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Salary:Not mentioned
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Employment StatusPermanent
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Job LocationBangalore, Karnataka, India
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EducationNot mentioned
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ExperienceYear