Senior Engineer, Verification

Year    Bangalore, Karnataka, India

Job Description

About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers' current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform--for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity PHY BU India. We handle All Copper PHY Design Verification for PHY BU.

Job Responsibilities:

Senior Verification Engineer :

  • Responsible for understanding the logic, develop testlist, verification environment, testcases etc.,required for verifying the logic, individually
  • Implement verification methodologies for testbench development
  • Develop scripts required for running simulations and regressions
  • Come up with the verification plan
  • Plan functional coverage/code coverage, analyze and improve coverage
  • Develop environment, tests and functional coverage
  • Review and update verification environment and testcases
  • Report, track and close logic issues
  • Work and communicate effectively with global team
Requirements:

Essential Responsibilities (not limited to):
  • Responsible for understanding the logic, develop testlist, verification environment, testcases etc.,required for verifying the logic, individually
  • Implement verification methodologies for testbench development
  • Develop scripts required for running simulations and regressions
  • Come up with the verification plan
  • Plan functional coverage/code coverage, analyze and improve coverage
  • Develop environment, tests and functional coverage
  • Review and update verification environment and testcases
  • Report, track and close logic issues
  • Work and communicate effectively with global team
#LI-KP1

Essential qualifications:
  • 3-5 years experience in PCIe link and physical layer verification.
  • Candidate must have excellent skills in digital logic verification and hardware description language (System Verilog)
  • Must have hands on experience in hardware verification methodologies such as UVM or OVM, Must be familiar with verification test planning and coverage driven verification closure,
  • Verification strategies for directed and randomized testing and assertions
  • Must have good experience in using simulation tools and proficiency in simulation debug techniques.
  • Able to build the verification environment from specification with guidance
  • Must have hands on knowledge on test-bench development and automation, bug tracking, and regression mechanisms
Preferred Skills:
  • Hands on Experience in PCIe link and physical layer verification
  • Strong background in SoC verification methodology and test bench development
  • Good programming skills desired, especially C++ and ARM assembly
  • IP architecture and verification knowledge
  • Formal Verification Experience is a Plus
  • Experience in scripting languages such as Perl, Python
  • Knowledge of Tools like Jenkins, Jira, Confluence
  • Gatelevel simulation
  • Experience with Linux operating system
  • Experience with Cadence or any other industry tools
  • Demonstrates good analysis and problem-solving skills
  • Should be a good team player
  • Good communication skills and quick learning ability.
  • Knowledge of standard configuration management system git, perforce
Education:
  • Bachelor's degree in Electronics & Communication, Electrical Engineering or related fields and 3-5 years of related professional experience.
  • Master's degree and/or PhD in Electronics & Communication, Electrical Engineering or related fields with 2-3 years of professional experience.
The Perks

With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

Your Future

Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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Job Detail

  • Job Id
    JD2939642
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Bangalore, Karnataka, India
  • Education
    Not mentioned
  • Experience
    Year