Job Description

RTL Design Lead - ARM-based SoCs

Key Responsibilities

Lead and own the RTL design of ARM-based IP/SoCs and subsystems from spec to RTL freeze. Translate micro-architecture specs into synthesizable RTL using

SystemVerilog/Verilog

. Collaborate with architects, verification, DFT, and physical design teams for seamless integration. Drive design reviews, logic synthesis readiness, and Lint/CDC compliance. Interface with firmware/software teams to ensure hardware-software co-design compatibility. Optimize designs for performance, power, and area (PPA).
Required Skills

8-12 years of experience

in digital RTL design, with at least

3+ years in lead roles

.

Proven experience working with

ARM Cortex-A/R/M processors

, AMBA protocols (AXI, AHB, APB). Strong knowledge of SoC bus interconnects, clock/reset architectures, and low-power design techniques (UPF). Hands-on expertise in

SystemVerilog

,

Verilog

, and design tools (Synopsys/Cadence). Familiarity with

Lint, CDC/RDC, synthesis, STA constraints

. Experience with

multi-power domain design

is a strong plus.
Job Type: Full-time

Pay: ?2,500,000.00 - ?3,000,000.00 per year

Benefits:

Health insurance Provident Fund
Schedule:

Day shift
Supplemental Pay:

Performance bonus
Work Location: In person