Principle Engineer Design Verification

Year    Noida, Uttar Pradesh, India

Job Description


Key Responsibilities- FPGA based Pre-Silicon validation Platform development for IP and Subsystems IP/SS Design porting and implementation for FPGA Development & bring-up of Pre-Silicon Validation platforms like Palladium/ZeBU/Veloce or FPGA for the IP/SOC Validation Development and execution of system use case scenarios Ability to work well as part of a team Knowledge/Skills 8-12 years of experience in developing FPGA based prototype platforms for multi-million gate IP/Subsystem/SoC Should be able to understand system level environment for MicroControllers Planning Test strategy, creating test plan and test code development to address functional and performance requirements of the IP/Subsystem. Experience with Verilog/System Verilog/VHDL and working knowledge of C/C++ Working knowledge of Palladium & FPGA platform Expertise in using validation environment test equipment e.g. Logic Analyzers, Oscilloscope, Protocol Analyzers etc. Experience in working on ARM core architectures would be an advantage. Applicants must be willing to work in Noida

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Job Detail

  • Job Id
    JD3041307
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Noida, Uttar Pradesh, India
  • Education
    Not mentioned
  • Experience
    Year