As a Lead Member Technical staff in the team, one will be working primarily on C++ and will be responsible for the design and development of various pieces of the RTL synthesis.
Should have:
3-7 years of experience in software development
B.Tech/M.Tech in CSE/ECE/EE from a reputed engineering college
Good knowledge of C/C++, Data structure & Algorithms.
Good problem solving and analytical skills
Good to have:
Experience in RTL Synthesis or any other EDA tool development.
Understanding of gate level digital logic design.
Knowledge of Verilog / VHDL.
Knowledge of scripting languages (Tcl, Csh, Python).
Job location:
Noida / Bangalore
# LI-EDA #DISW
Organization: Digital Industries Company: Siemens EDA (India) Private Limited Experience Level: Experienced Professional Full / Part time: Full-time
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