At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Desired Skills:
5 - 8 years of experience in System development and verification is desired
Strong fundamental knowledge and understanding of design and verification methodologies of System, Sub-system and IP level (UVM is a plus)
Good understanding of HDLs (Verilog/System Verilog )
Develop test plans and write tests based on the requirements. Execute on test plans and perform unit, integration, Product/solutions level verification
Good Working Knowledge on EDA tools (Cadence/others) with focus towards debugging Design/verification problems
Excellent verbal and written communications skills
Strong problem solving and analytical skills
Advantage:
Good knowledge in software languages (C++/PYTHON/JAVA/JAVA Script)
Customer support experience
Knowledge in scripting Perl /shell scripting or similar languages
Educational Qualification : BE/BTech or ME/M.Tech Graduate with Computer Science/Electronics & Communication/Electrical & Electronics/VLSI engineering or any other equivalent courses
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