Job Description

and Requirements

Internship at Synopsys: Job description
Synopsys is looking for engineering graduates/PG students to work as interns in the field of VLSI.

Description:
The focus of work would be VLSI design/Verification in one of the following areas related to connectivity protocols: USB/Ethernet/AMBA/MIPI/Memory Controllers

The nature of work would be on the following lines:
Architecture exploration of the sub-blocks within one of these IPs to optimize for area, speed and power
VLSI Design & verification of these sub-blocks/exploration of latest features and standards.
Based on project assigned, the job would involve one or more of the following activities: Verilog/System Verilog/ Vera coding, Exposure to UVM methodology, working with EDA tools like Design Compiler for Synthesis, SpyGlass for Lint, VCS for simulation.

Requirements:
The candidate must be doing their Bachelor's degree in Electronics/ Electrical Engineering and be in their final semester by Jan'22.
Or going through MS/MTech and completed first semester and take up internship as part of the 1 year academic project requirement . (Electrical/Electronics/VLSI/MicroElectronics or allied specializations.)
Minimum 7.0 CGPA/ 70% in Bachelor's in Engineering and 7.5 CGPA in Master's till the current semester.
Need to be backed with consistently high academics in 10th std and 12th standard.
Strong fundamentals in Digital electronics.
HDL Languages coding experience preferably in Verilog/Vera/System Verilog.

Tenure: Typically, 12 months.
Location: The positions are based out of Synopsys offices at Bangalore and would require the candidate to physically work out of Synopsys offices during the office hours 5 days/ week during the internship tenure.
Note: Synopsys converts many of its Interns to full time employees after the completion of internship and based on performance during the internship tenure and business needs.

Hire Type

Intern

Job Category

Interns/Temp

Job Subcategory

Interns