Job Description

Company:

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Qualcomm India Private Limited

Job Area:

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Engineering Group, Engineering Group > Hardware Engineering

General Summary:

3-6 years experience in Digital ASIC / Processor Design + Strong fundamentals in core areas: Microarchitecture, Computer Arithmetic, Circuit Design, Process Technology + Strong communication skills to work with design teams worldwide
+ Extensive experience in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Power, PTPX, Primetime, Conformal ECO
+ Extensive experience in UPF based power intent and synthesis

Minimum Qualifications:

Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
OR

Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.


OR

PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.
High-speed and Low-power 5G and WLAN Modem Hardmacro Implementation Lead

Lead, train and mentor team of junior engineers to execute on a complex project for a large modem design in advanced process nodes Work closely with RTL, DFT and PD leads worldwide to take a project from Post-RTL to Netlist release, and converge on area, timing, power and testability Primary tasks include writing timing constraints, synthesis, formal verification, CLP, Primetime, PTPX, CECO Optimize datapath design for low-area, low-power and high-speed using advanced features in synthesis such as MCMM, SAIF, multibit mapping etc. Optimize PPA using the right tool options and stdcell libraries / memories Handle complex digital blocks with >1M gates in advanced process nodes from 4nm / 5nm / 7nm / 8nm

Applicants

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