Job Description

About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible(TM). Learn more at www.analog.com and on LinkedIn and Twitter (X). S

taff

Digital

Mixed Signal

(DMS)

Design

Verification

Engineer

Digital

Business Unit

(D

BU

) Analog Devices is seeking

Digital

Mixed Signal

Design

Verification Engineer

for a Staff level role,

who will

be responsible for

design

verification of highly integrated solutions and products

in a multifunctional team. You will be working on driving real revenue growth on the next generation of Intelligence at the Edge products across multiple products and business units.

About the Role

Key

members

of

design

verification team, which has both

digital

mixed-signal

and digital

design

verification

engineers

. T

he candidate will

be responsible for

formulating verification strategies and

leading,

driving

and completing verification of large integrated products. As a senior team member, it is expected that he/she will lead and influence verification methodologies within both

D

BU

and ADI. The

candidate is also

encouraged to participate in

cross company

technical initiatives as well as patent and publish work where possible

.

RequirementsB.Tech/M.Tech with 8+ years of industry experience in analog/mixed signal behavioral modeling at various levels of abstraction and full chip verification (DMS DV). Good understanding of analog design concepts and mixed signal design architectures. Exposure to products that integrate a wide variety of Analog/Mixed-Signal building blocks such as Power Management, ADCs, DACs, PLL, bandgap references, oscillators, SerDes etc. and related digital control and signal processing. Demonstrated experience of verification plan, verification environment development and verification/debug of complex mixed signal products at block & chip-top levels in DMS set-up. Experience of co-simulations with analog models and digital RTL/Gate+SDFs. Proven experience in closing the verification of analog macro's and its interaction with digital components using industry standard metrics is a must. Exceptional interpersonal and communication skills, collaborate and influence innovative design development/verification methodologies to wider team spread across the globe. Proficiency in the technical & interdependency management of DMS DV team execution is a must. Quick to adopt new technologies with good problem-solving skills. Self-motivated and enthusiastic. *Responsibilities

& Key Skill Sets

Come up with verification strategy for a product after going through product requirements and design specifications.
Create SV Real Number Models for analog/mixed-signal blocks for subsystem & chip-top verification. Validate models against actual design. Familiarity with Analog/Mixed-Signal/RF design architectures and debug experience with Xcelium, DMSO, Schematic capture tools such as Cadence Virtuoso and waveform viewers such as Cadence Simvision and Verisium. Experience with SV/UVM (agent creation, env building, score-boarding, RAL etc.). Create verification plans, build DMS verification environment for subsystem & chip-top verification, develop self-checking testcases. Tracking verification metrics and regression management, Metric Driven Verification (MDV) framework using tools such as Cadence vManager. Verification closure using vplan mapping, code & functional coverage. Collaborate and work closely with team members from various disciplines (system architects, digital design, analog design, digital DV, PTE etc.) for first pass silicon. Support DFT & test and characterization teams in validating key scenario's in pre-silicon environment for faster post-silicon bench bring-up and validation. Work on the Flow/KPI improvement initiatives or design verification methodologies Automation with scripting languages: Python/Perl/Shell etc. Formal Verification using Jasper. Expected to be the overall DMS DV lead of a project. Mentor fresh graduates and junior engineers
#LI-SM1For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced


Required Travel: Yes, 10% of the time


Shift Type: 1st Shift/Days