Job Description

WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world\'s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. This is who we are at our best. One Company. One Team. AMD together we advance_ Senior Silicon Design Engineer THE ROLE: The Core design and verification team is responsible for development of \'High performance and Ultralow power x86 microprocessor core\'. The role provides a unique opportunity to work at the micro-architectural level of the next-gen Core, with exposure to designs that defines the next wave of client (laptops/ultra-books/think-clients) and custom designs. The multi-million gate complexity and high-frequency (GHz) design development gives the learning experience of the latest and greatest design and verification methodologies, using advanced technology nodes. THE PERSON: Candidates should have hands on experience on verification of complex designs. Candidates should have good understanding of complete verification cycle. Candidate should be very strong with programming skills and the debug skills. KEY RESPONSIBILITIES: Verification of high performance x86-core ISA features, clock/reset/power features of processor. Verification of power management features, cache, coherency and data path. Execution of testplan to develop testbench components for the feature verification. Execution of coverage plan for the verification closure. Understanding the micro architecture specification and root cause regression failures by correlating the spec to the design. Understanding the existing test bench setup and look for opportunities to improve the existing test bench. Your commitment to innovating as a team demonstrated through excellent communication, knowledge of proper documentation techniques, and independently driving tasks to completion. PREFERRED EXPERIENCE: ASIC design verification experience 4+ years. Good understanding the design and verification lifecycle. Hands on verification experience with C++/SystemVerilog testbench development. Strong understanding of OOPs concepts, programming skills and debug skills. Experience with x86, ARM or any other industry standard microprocessor ISA is preferrable. Experience with Cache, Coherency and Data-Consistency verification is desirable. Understanding of low power design verification techniques is a plus. ACADEMIC CREDENTIALS: Master\'s degree preferred with emphasis in Electrical/Electronics Engineering, Computer Engineering, or Computer Science with a focus on computer architecture LOCATION: Hyderabad, Bangalore AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services. AMD and its subsidiaries are equal opportunity employers and will consider all applicants without regard to race, marital status, sex, age, color, religion, national origin, veteran status, disability or any other characteristic protected by law. #LI-PK1 Benefits offered are described: . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants\' needs under the respective laws throughout all stages of the recruitment and selection process.

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