Develop and execute verification plans for units and features Construct testbenches, scoreboards, and stimulus generators Implement functional coverage models Debug designs in simulation, prototyping platforms, and silicon Required Qualifications: Roles requiring both 4+ and 8+ years experience with CPU microarchitecture (e.g. x86, ARM, SPARC, MIPS, RISC-V, POWER) and/or coherent caching systems Bachelors or Masters degree in related engineering field Ability to work independently and across geographies Strong domain knowledge of computer architecture Desired Qualifications: SystemVerilog verification development experience Testbench construction using UVM or analogous methodologies Scoreboards and stimulus generators for complex units Software development experience in compiled (C/C++) and interpreted (Python) languages Unit or feature ownership throughout the project lifecycle Post-silicon validation
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