Overview:
Rambus, a premier chip and silicon IP provider making data faster and safer, is seeking to hire an exceptional SPE Logic Design Engineer to join our MIC IDC Design team in Bengaluru. In this role, you will be working with some of the brightest inventors and engineers in the world developing products that make data faster and safer.
As a SPE Logic Design Engineer, you'll play a pivotal role in designing and implementing the world's best Registered Clocking Driver (RCD) products. In this full-time role, you'll report directly to our Logic Design Manager. Our MIC IDC is dedicated to leverage over three decades of high-performance memory expertise to deliver cutting-edge memory interface chipset solutions, enhancing memory bandwidth and capacity for data centers and client applications alike, and your contributions will be instrumental in RCD product development.
Rambus offers a flexible work environment, embracing a hybrid approach for most office-based roles. Employees are encouraged to spend an average of at least three days per week onsite, allowing for two days of remote work.
Responsibilities:
Understand the spec requirements and convert into a micro architecture specification.
Realize the RTL design using Verilog/System Verilog.
Works with verification teams in defining the test plan and reviews the test coverage.
Does pre implementation design checks like lint, CDC, RDC, constraint validation.
Works with physical design team in defining the design and timing constraints and driving implementation till timing closure.
Interact with cross functional circuit teams for new product development
Participate in Architecture level discussions to define the specifications.
Post silicon validation support in bringing up parts
Qualifications:
Minimum 15 years of solid ASIC logic/Digital design expertise with bachelor's degree or master's degree
Strong digital design fundamentals.
Strong hands on expertise in HDLs like Verilog/System Verilog.
Experience with EDA tools for simulation, synthesis, and timing analysis and logic equivalence check.
Knowledge of High speed protocols is plus.
Strong scripting abilities using Perl/Tcl/python is a plus
Strong written and verbal communication skills. Able to break down technical concepts to a larger audience is desired.
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