Job Description

As a Design Verification Engineer at MediaTek, you will play a critical role in ensuring the quality and reliability of our cutting-edge SoC designs. You will work on innovative projects that power the future of technology, collaborating with a global team of experts in a fast-paced and dynamic environment. Key Responsibilities: o Work on functional Test Plan at SoC level, focusing on Integration testing, system bus and peripheral connectivity and end to end transaction verification. o Work on testbench design, and improvements for the required verification. Ensure seamless system boot-up integration and correct architecture/system level behavior of the design. o Write SoC level tests using C/Assembly language. o Identify and resolve verification issues. Develop and execute SoC verification methodologies and flows to ensure high-quality deliverables. o Work on Netlist and SDF annotated design verification activities. o Drive code and functional coverage closure and ensure through validation of designs. o Collaborate with cross-functional teams to address verification challenges and optimize processes.

o Experience: 3-15 years of hands-on experience in SoC verification. Candidates with higher experience will be considered for senior or lead roles. The candidate has a strong background in computer science, electrical engineering, or related fields. o Technical Expertise: Strong background in SoC verification methodologies and flows, with exposure to IP or Subsystem-level verification. o Programming Skills: Proficiency in System Verilog and UVM methodology is essential. o Problem-Solving: Excellent analytical and problem-solving skills, with attention to detail. o Communication & Collaboration: Strong communication skills ( written and verbal ) and Ability to work collaboratively in a fast-paced environment spanning across geographies. o Low Power Verification: Experience in low-power verification is a plus. o Knowledge of Python/ Perl/TCL for automation and tool integration.