Job Description

Super Compute Platform (SCP) Group is a newly formed team focused on execution in strategic growth areas of building high-performance computing (HPC) products for Intel. SCP is looking for SoC Micro-architect focusing on various infrastructural aspects of SoC like Boot/Reset flows, Clocking, Fuse and Chiplet D2D interconnects etc. As a part of Micro-Architecture team, the person would be responsible for defining the boot/reset flows, working out the fuse details of various IPs and feature across the chiplet, defining the clocking requirements of various IPs and interface with the other SoC micro-architects, work out the implementation details of SoC infrastructure and deliver the high level Architecture specifications (HAS) and Microarchitecture specifications (MAS) for the design team. More detailed responsibilities are: - Define and document Micro-architectural specification for SoC infrastructure (Clocks and Resets, Boot and Reset Flows, GPIO\'s, Fuse, D2D etc.) - Becoming an expert and owning the development of one or multiple specific areas of our SoC infrastructure and guide the design team. - Leading SoC-level features and strategic initiatives - Developing micro-architecture for SoC-owned logic blocks - Define the features and flows to be implemented at the IP level. - The candidate is expected to actively collaborate with other SoC architects, IP and Domain architects as well as design and software engineers working on complex SoCs. - Work with SW/FW team to ensure a secure and streamline data flow between IPs. Support complex system integration and debug tasks. - Responsible for RTL reviews, test plan reviews, problem debug on both pre-silicon and post-silicon environments, finding workarounds, physical/structured design reviews. Our team is : - Open to new ideas and methodologies - A collaborative team demonstrating the best teamwork across Intel - Includes people who want to do innovative things

Qualifications

- B.Tech in CE or EE (Mtech - advantage) - 8-15+ years of experience in SoC/ASIC/FPGA development with minimum 2-3 years of experience in SoC microarchitecture and architecture at Soc level - Deep understanding and experience in HW design flows and Micro-architecture - Deep understanding and Experience of Designing or validating SoC\'s, CPU\'s, or IP blocks. - Knowledge of Hardware Description Languages (System Verilog, Verilog, or VHDL) and Static Timing Analysis. - Preferably experience in IP integration and/or SoC-level flows experience, including clocking, boot/reset flows, fuse concepts, IP interconnect fabrics, High speed IO integration, etc. In addition to the qualifications listed below the ideal candidate will demonstrate the following traits: - A self-driven, motivated, excellent communicator, extremely organized, collaborates with other team members and committed to deliveries and timelines

Inside this Business Group

The focus of Accelerated Computing Systems and Graphics (AXG) is to accelerate our execution in strategic growth areas of high-performance computing and graphics. AXG is chartered with delivering high performance computing and graphics solutions (IP, Software, Systems), for both integrated and discrete segments across client, enterprise and data center. Our mission is to make zeta-scale computing accessible to every human on the planet by the end of this decade and to entertain, educate and connect billions of people with buttery smooth visual experiences.

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Benefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here: https://www.intel.com/content/www/us/en/jobs/benefits.html

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Working Model

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
JobType Hybrid