Silicon Logic Formal Verification Full Time

Year    KA, IN, India

Job Description

Positions are open for full-time and co-op/internship roles in the areas of formal verification of CPU, Fabric, and Accelerator design

Responsibilities



+ As a Formal Verification Engineer, you will be involved in the formal verification of the architecture and microarchitecture of a high-performance RISC-V core, a coherent fabric, and an accelerator design. + In this position, you will:


+ Work with architects and RTL design engineers to identify, specify, and verify artifacts amenable to formal analysis.
+ Prove functional and security properties of the design, find design bugs, and work closely with design teams to deliver high-quality designs.
+ Develop sound formal abstract models for verifying system-level properties like deadlock freedom and non-starvation using formal methods.
+ Develop innovative flows using formal methods in conjunction with simulation-based techniques for effective bug hunting.
+ Develop reusable and scalable proof techniques.

Requirements



+ Solid understanding of formally specifying and analyzing temporal assertion properties. + Hands-on experience using model checking tools.
+ Experience with interactive theorem provers is a plus.
+ Excellent problem-solving skills, along with strong written and verbal communication abilities.
+ Excellent organizational skills and high self-motivation.
+ Ability to communicate and work well with different design teams.

PhD, Master's Degree, or Bachelor's Degree in a technical subject area.

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Job Detail

  • Job Id
    JD4059207
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    KA, IN, India
  • Education
    Not mentioned
  • Experience
    Year