Senior Verification Engineer
Job Description
Responsibilities Drive functional verification at IP/SoC level using UVM/SV test bench Work closely with design team to define comprehensive feature test plans Perform functional and code coverage for logic verification sign-off Must have worked on ARM/RISC-VCPU based designs Must have performed gate level sim at SoC level Pre and Post-silicon debug/validation experience will be a plus Qualifications M.Tech/B.Tech in the field of VLSI/Electronics engineering. 5 years of experience. Proficiency in UVM/SV and C/C based functional verification Experience in UPF based low power design verification Automation skills in PERL and /or TCL and /or Shell Team player, with good problem solving and communication skills.
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Job Detail
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Job IdJD3161594
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IndustryNot mentioned
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Total Positions1
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Job Type:Full Time
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Salary:Not mentioned
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Employment StatusPermanent
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Job LocationPune, Maharashtra, India
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EducationNot mentioned
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ExperienceYear