Job Description

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We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

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You Are:

You are a passionate and highly skilled engineer with deep expertise in Design-for-Test (DFT) RTL coding and pattern generation, backed by more than a decade of hands-on experience. You thrive in collaborative, cross-functional environments, working seamlessly with R&D teams, customers, and product managers to develop and deploy robust silicon lifecycle management solutions. Your technical proficiency spans DFT domain standards such as IEEE 1149.1, 1687/1500, SCAN, ATPG, and MBIST methodologies, and you bring a strong understanding of flow automation using TCL.


You possess a keen analytical mind, enabling you to dissect micro-architecture, debug complex issues, and optimize test coverage and silicon health monitoring throughout the product lifecycle. Your experience in customer-facing roles allows you to confidently guide and educate clients, translating their requirements into actionable solutions and ensuring their success. You value continuous learning, keeping up with the latest industry advancements, and actively contributing to the development of next-generation SLM IPs and solutions.


Interpersonal skills, clear communication, and a proactive attitude define your approach. You are adept at multitasking and thrive in multi-site, global teams. You are motivated by the opportunity to work with some of the brightest minds in the industry, making meaningful contributions to the field of high-performance silicon and driving innovation at scale.

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What You'll Be Doing:

Collaborating closely with world-class R&D teams to develop and deliver end-to-end Silicon Lifecycle Management (SLM) solutions for a diverse customer base. Engaging directly with customers to capture detailed requirements and translate them for robust product development. Validating SLM solutions internally and in customer environments to ensure quality and reliability prior to deployment. Driving the deployment and seamless execution of SLM solutions in customer projects, ensuring successful adoption and performance. Enabling customers to leverage silicon health monitoring throughout the lifecycle, from bring-up and validation to in-field operations. Automating DFT flows using TCL and supporting post-silicon bring-up activities in collaboration with tester teams. Providing technical guidance and troubleshooting support to both internal teams and customers.
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The Impact You Will Have:

Accelerating the enhancement and adoption of Synopsys' Silicon Lifecycle Management IP portfolio, especially in the evolving multi-die domain. Influencing the development and deployment of next-generation SLM IPs and solutions, shaping the future of silicon health technologies. Empowering leading data center, AI, and automotive customers to optimize their silicon performance and reliability. Driving innovation in DFT methodologies, contributing to Synopsys' reputation as a global leader in semiconductor solutions. Facilitating seamless customer experiences through expert technical support and solution deployment. Expanding the reach of Synopsys' SLM solutions across worldwide premier customers, strengthening industry partnerships.
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What You'll Need:

BSEE/MSEE in Electrical Engineering, Computer Engineering, or a related field. 12+ years of hands-on experience in the DFT domain, including RTL analysis and debugging. Expertise in IEEE 1149.1, IEEE 1687/1500, and Test Access Mechanisms. Proven experience with SCAN & ATPG pattern generation, verification, and coverage analysis. Hands-on experience with BIST-based testing methodologies, preferably MBIST. Proficiency in flow automation using TCL and exposure to synthesis and timing constraints (SDC). Experience with Post-SI bring-up and working with tester teams. Knowledge of Lint, CDC, RDC tools and clocking concepts is a plus. Strong debugging abilities for timing verification and simulations. Customer-facing experience, including technical education and guidance. Architecture/micro-architecture experience is desirable.
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Who You Are:

Innovative thinker with a strong technical acumen and problem-solving skills. Excellent communicator, able to articulate complex technical concepts to diverse audiences. Collaborative team player, thriving in multi-site, cross-functional environments. Detail-oriented, analytical, and capable of managing multiple priorities. Customer-focused, with a commitment to delivering high-quality solutions and support. Adaptable and proactive, eager to learn and contribute to ongoing innovation.
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The Team You'll Be A Part Of:

As part of the Silicon Lifecycle Management (SLM) solutions team, you will collaborate with global R&D teams to develop world-class IPs and end-to-end solutions to address silicon health issues at premier data center, AI, and automotive customers. Our team is dedicated to bringing solutions to enhance the life of silicon anywhere it belongs, driving technological advancements and industry-leading innovation.

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Rewards and Benefits:

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.