Job Description

About Marvell

At Marvell, we believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. Trusted by the world's leading technology companies for 25 years, we move, store, process and secure the world's data with semiconductor solutions designed for our customers' current needs and future ambitions. Through a process of deep collaboration and transparency, we're ultimately changing the way tomorrow's enterprise, cloud, automotive, and carrier architectures transform--for the better.

The data infrastructure that our customers build has never been more critical to our global economy. It's what's keeping the world connected, businesses running, and information flowing. If you're ready to excel, innovate, and truly enjoy your work, apply now for the position detailed below.

The Opportunity Marvell's CXL Product Development team works on groundbreaking innovations for the composable datacenter. We are looking for individuals with a deep understanding and passion for IP & SoC Design to craft creative solutions for general purpose as well as custom applications for some of the industry's most complex semiconductor chips. If you're creative and autonomous, with a passion for leading cross-functional teams we want to hear from you! At Marvell, you will have the opportunity to shape some of the most incredible products to address the needs of the next generation datacenters.

Job Responsibilities:

As a Senior Staff Design Engineer, you will lead micro-architecture and RTL development and HW/SW co-design efforts working across multi-functional teams, in developing state-of-the-art designs for the up and coming CXL product roadmap.
Additional responsibilities will include, but not be limited to:
Responsible for micro-architecture design and development of SOC and associated component IP like Memory Controllers/PCIE interface/CXL interfaces etc.
Working with Architects and Verification engineers to deliver develop complex, high performance and timing critical designs through all aspects of the SoC front-end design flow (incl. timing closure and power optimization)

Requirements:

Bachelor's degree in Computer Science, Electrical Engineering or related fields and 5-10 years of related professional experience.
Master's degree and/or PhD in Computer Science, Electrical Engineering or related fields with 3-5 years of experience.

Strong understanding of SoC architecture, processor cores, memory and peripheral interfaces through hands on prior experience
Extensive experience in Verilog/VHDL, Spyglass and Quality checks of the implemented RTL for LINT, CDC
Hands on experience in interpretive language such as Perl/Python
Proven track record of delivering production-quality designs on aggressive development schedules.
Domain expertise in CXL/PCIe protocols, DDR memory controllers is a plus

The Perks

With competitive compensation and great benefits, you will enjoy our workstyle within an incredible culture. We'll give you all the tools you need to succeed so you can grow and develop with us. For additional information on what it's like to work at Marvell, visit our page.

Your Future

Marvell provides a work environment that promotes employee growth and development. We are searching for an individual who wants to grow with the company and will strive to improve performance. If you are driven, personable, and energetic, there will be additional opportunities for you here at Marvell.

This role is eligible for our hybrid work model in which you will be able to split time between working from home and on-site in a Marvell office.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.