Senior Principal Design Engieer

Year    Hyderabad, Telangana, India

Job Description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.
Cadence design system is Hiring for Analog design Engineers EXP-8-20yrs
Analog design (10-15yrs of exp)
BE/BTECH/ME/METCH or Equivalent Degree
Job role

  • Education: BE/ B Tech/ ME/ M Tech / MS
In-depth understanding of high-speed Serdes/Memory interface circuits like I/O's,PLL's, Clocking, Datapath's.
Hands on experience on PCIe Gen3/4/5/6, GDDRx/DDRx/LPDDRx memory interface circuits. * Must have exposure: High speed analog circuit design, Exposure to high-speed Tx-Rx designs, Preferable to have exposure to high speed Phy architecture.
  • Must have exposure: High speed analog circuit design, Exposure to Architecture understanding of multiple high-speed analog Phy PCIe, DDR, including Die-die protocols etc....
  • Strong Analog Design and I/O Design fundamentals. Knowledge of ESD/Reliability/SI/PI.
Experience in leading complex IP's , managing cross functional dependencies needed.
Experience in leading and mentoring Junior Engineers.
Must have excellent written and verbal communication skills as well as good problem-solving skills.
Prior experience of working on cutting edge technology nodes like 16nm/10nm/12nm/7nm is added advantage.
We're doing work that matters. Help us solve what others can't.

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Job Detail

  • Job Id
    JD3770801
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Hyderabad, Telangana, India
  • Education
    Not mentioned
  • Experience
    Year