Job Description

We are seeking a Digital Design Verification Engineer with at least 5 years of hands-on experience in digital IC design and verification. In this role, you will be responsible for ensuring the functional correctness, quality, and testability of advanced digital and mixed-signal IPs. You will collaborate closely with design, DFT, and physical design teams to deliver high-quality, production-ready IPs that meet stringent PPA and test requirements.

Key Responsibilities

Develop and execute verification plans, testbenches, and testcases using SystemVerilog/UVM or equivalent verification methodologies. Drive DFT (Design for Test) and scan insertion strategy and implementation, including scan architecture, ATPG, MBIST, and boundary scan. Work closely with design and architecture teams to review specifications, define verification methodologies, and identify potential risks. Develop and maintain verification infrastructure (constrained random, coverage-driven, assertions, and checkers). Perform simulation, debug functional failures, and collaborate with designers to resolve issues. Support silicon bring-up and validation activities, correlating pre-silicon and post-silicon results. Contribute to continuous improvement of verification processes, tools, and flows to enhance productivity and quality. .
#LI-RT1

onsemi

(Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world's most complex challenges and leads the way in creating a safer, cleaner, and smarter world.





More details about our company benefits can be found here:
https://www.onsemi.com/careers/career-benefits

We are committed to sourcing, attracting, and hiring high-performance innovators, while providing all candidates a positive recruitment experience that builds our brand as a great place to work.

Preferred Qualifications


Experience with low-power design verification (UPF/CPF). Exposure to memory IP verification (SRAM, ROM, NVM) and associated test methodologies.
Familiarity with formal verification tools and assertion-based verification



#LI-RT1



Required Qualifications


Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field. 3+ years of industry experience in digital design verification. Strong expertise in SystemVerilog, UVM, and functional verification methodologies. Experience with DFT concepts such as scan insertion, ATPG, BIST, and fault simulation. Solid understanding of digital design fundamentals, RTL coding, synthesis, and timing concepts. Hands-on experience with industry-standard EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa, or equivalent). Proficiency in scripting (Perl, Python, or Tcl) to automate verification tasks. Strong problem-solving, debug, and communication skills with the ability to work in cross-functional teams.

#LI-RT1