Rtl Design Engineer
Year Hyderabad, Telangana, India
Job Description
Experience Required - 3 -5 Years
Location - Hyderabad - wfo
- Strong in digital design.
- Strong in Xilinx Vivado IP & IPI tools till bit-generation.
- Knowledge of VHDL/Verilog/System Verilog.
- Lint/CDC/Timing Closure
- Knowledge of Validating IP/IP Example designs on Xilinx boards, debugging of failures on target boards, board bring up.
- Proficiency in Linux environment.
- Good communication skills.
if you are interested , email -karthikeyan.k@cielhr.com
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Job Detail
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Job IdJD3236155
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IndustryNot mentioned
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Total Positions1
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Job Type:Full Time
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Salary:Not mentioned
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Employment StatusPermanent
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Job LocationHyderabad, Telangana, India
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EducationNot mentioned
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ExperienceYear