Job Description

Category

Engineering

Hire Type

Employee

Job ID

12384

Remote Eligible

No

Date Posted

30/07/2025

Alternate Job Titles:

Senior R&D Engineer - Memory Design

We Are:

At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.

You Are:

You are a passionate and experienced engineer who thrives in fast-paced, collaborative environments. With a solid foundation in CMOS memory design and a drive for technical excellence, you take pride in delivering robust, high-performance solutions. You enjoy solving complex problems, whether it's optimizing for ultra-high speed, ultra-low power, or high-density memory architectures. Your analytical mindset and meticulous attention to detail ensure that your designs are both innovative and reliable.


You come equipped with a Bachelor's or Master's degree in Electrical Engineering, Telecommunication, or a related discipline, and have hands-on experience in schematic entry, circuit simulation, and memory layout design. You are adept at using industry-standard tools for layout parasitic extraction and verification, and you approach debugging methodically. Your programming skills in C-Shell, Perl, and possibly C++ or JavaScript, enable you to automate and streamline workflows.


Your communication skills--both written and verbal--are strong, allowing you to clearly document your work and collaborate effectively with cross-functional teams. You are self-motivated, organized, and take initiative in mentoring junior colleagues and leading projects. You value diversity, inclusion, and continuous learning, and are committed to professional growth for yourself and those around you. Above all, you are excited to make an impact at Synopsys and contribute to the next generation of semiconductor technology.

What You'll Be Doing:

Designing and developing CMOS embedded memories including SP SRAM, DP SRAM, Register File, and ROM, with a focus on high speed, low power, and high-density architectures. Leading the architecture and circuit implementation phases, from schematic entry and simulation to layout planning and supervision. Driving the verification and validation of memory designs, ensuring robust performance across all process, voltage, and temperature corners. Collaborating with CAD and frontend engineers to automate memory compiler workflows, generate EDA models, and establish comprehensive verification flows. Developing and verifying memory bit cells, and managing physical layout design and verification to meet stringent quality and manufacturability standards. Documenting processes, preparing technical reports and presentations, and supporting cross-team communication and project reviews. Mentoring and leading junior engineers and trainees, fostering a culture of continuous learning and innovation.

The Impact You Will Have:

Advance Synopsys' leadership in embedded memory IP by delivering cutting-edge memory solutions that power next-generation chips. Enable customers to achieve higher performance, lower power consumption, and greater silicon efficiency in their end products. Streamline design and verification processes, reducing time-to-market and enhancing design productivity for global teams. Drive innovation in memory architecture, contributing to Synopsys' portfolio of patented technologies and industry-leading features. Support customer success by providing robust, silicon-proven memory IP that meets the most demanding requirements in AI, automotive, and consumer electronics. Mentor and develop junior team members, ensuring a strong pipeline of talent and expertise within the organization.

What You'll Need:

Bachelor's or Master's degree in Electrical Engineering, Telecommunication, or a closely related field. Proficiency in CMOS memory design, circuit simulation, and memory layout design, with experience in layout parasitic extraction and verification tools. Strong programming skills in C-Shell and Perl; knowledge of C++ or JavaScript is a plus. * Expertise in technical documentation and the ability to prepare clear reports and presentations using Microsoft Office Suite (Word, Excel, PowerPoint,