Job Description

Principal PD Engineer

=========================


Bangalore, Karnataka, India



Date posted

Jul 14, 2025

Job number

1842676

Work site

Up to 50% work from home

Travel

0-25

%

Role type

Individual Contributor

Profession

Hardware Engineering

Discipline

Silicon Engineering

Employment type

Full-Time

Overview

Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft's expanding Cloud Infrastructure and responsible for powering Microsoft's "Intelligent Cloud" mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission.


As Microsoft's cloud business continues to grow the ability to deploy new offerings and hardware infrastructure on time, in high volume with high quality and lowest cost is of paramount importance. To achieve this goal, the

AISiE

team is instrumental in defining and delivering operational measures of success for hardware manufacturing, improving the planning process, quality, delivery, scale and sustainability related to Microsoft cloud hardware. We are looking for seasoned engineers with a dedicated passion for customer focused solutions, insight and industry knowledge to envision and implement future technical solutions that will manage and optimize the Cloud infrastructure.


We are looking for a

Principal PD Engineer

to join the team.



#SCHIE

Qualifications

Bachelor's or Master's in Electrical or Computer Engineering or related field with 15+ years of experience Experience in tapeouts of complex ASICs in leading edge technology 10+ years of experience in floorplanning, physical design, and integration of semiconductor designs. Expertise in physical design tools and methodologies such as Cadence Innovus, Synopsys DP, and Calibre. Strong understanding of semiconductor design principles, methodologies, and tools. Proven track record of successfully leading physical design projects and delivering high-quality semiconductor products. Excellent communication, teamwork, and leadership skills. Ability to work in a fast-paced and dynamic environment, and drive cross-functional collaboration. Good understanding of foundry tech files and rule decks


Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

This role will require access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the successful candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the successful candidate's citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable.

Responsibilities

We are seeking a highly skilled and experienced Principal Floorplan and Physical Integration Engineer to join our dynamic team. As a key member of our semiconductor design team, you will be responsible for leading the floorplanning and physical integration efforts to ensure the successful development of cutting-edge semiconductor products.

Lead the floorplanning process to optimize chip area, power, and performance for complex semiconductor designs. Collaborate with Architecture, design, and implementation teams to ensure that floorplan meets design requirements and constraints. Develop and implement methodologies and strategies to improve physical design efficiency and performance. Conduct physical design reviews, identify and resolve design issues, and provide guidance to junior engineers. Work closely with cross-functional teams to drive project success and meet project milestones. Stay current with industry trends and emerging technologies to continuously improve physical design processes and methodologies.

Benefits/perks listed below may vary depending on the nature of your employment with Microsoft and the country where you work.
?Industry leading healthcare
?Educational resources
?Discounts on products and services
?Savings and investments
?Maternity and paternity leave
?Generous time away
?Giving programs
?Opportunities to network and connect
Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.