Job Description

Job Title: Physical Design Tools and Flow Methodology lead
(Mid to Senior
Level)
Location: Bengaluru, India
Experience: 7 18 years
Industry: Semiconductors | AI | Networking | ASIC Design
Key Responsibilities
Flow Development & Automation: Design, develop, and maintain a robust, automated, and
scalable physical design flow for synthesis, floorplanning, placement, clock tree synthesis (CTS),
routing, and sign-off verification.
Tool Evaluation & Benchmarking: Lead the evaluation, selection, and deployment of new EDA
tools and technologies. Conduct rigorous benchmarking of tools from major vendors (Synopsys,
Cadence, Mentor) to ensure our flow is best-in-class.
Methodology Enhancement: Proactively identify bottlenecks and inefficiencies in the current
flow. Develop and implement innovative methodologies to improve PPA, reduce turn-around time
(TAT), and enhance design productivity.
Technical Leadership & Support: Act as a subject matter expert (SME) for the physical design
team. Provide expert-level support and guidance on tool usage, flow issues, and complex design
closure challenges.
Vendor Collaboration: Work closely with EDA vendors to resolve tool bugs, drive feature
enhancements, and influence their product roadmaps to meet our project needs.
Documentation & Training: Create and maintain comprehensive documentation for flows, tools,
and methodologies. Conduct training sessions to enable design teams to effectively use the
established flows.
Process Node Enablement: Lead the enablement of the physical design flow for new and
advanced technology nodes, including developing new rules, scripts, and methodologies required
by the foundry.
Key Skills
Synthesis & Place and Route: Deep expertise with industry-standard tools such as Synopsys
Fusion Compiler/ICC2 or Cadence Innovus/Genus.
Sign-off: Mastery of sign-off tools for timing (PrimeTime), physical verification (Calibre, ICV),
power analysis (RedHawk, Voltus), and reliability (Totem).
Floorplanning & Power Grid: Strong understanding of floorplanning principles and experience
with power grid (PG) mesh creation and analysis.
Scripting Expertise: High proficiency in scripting languages is essential. Must be an expert in
TCL and have strong skills in Perl and/or Python for automation and flow development.
Process Technology: Proven experience working on advanced process nodes (7nm/5nm and
below) is highly desirable.
Problem-Solving: Exceptional analytical and debugging skills with a demonstrated ability to
solve complex technical problems independently.
Communication: Excellent verbal and written communication skills, with the ability to collaborate
effectively with cross-functional teams and mentor junior engineers.
Preferred Qualifications
Master's or PhD in Electrical Engineering, Computer Engineering, or related field.