Job Description

Key Responsibilities:

Interpret schematics, layouts, BOMs, and datasheets to understand components, their packaging, and PCB requirements. Create and maintain schematic symbols and footprints per:

o ANSI Y32.2 / IEEE 315 (US schematic symbols)

o IEC 60617 (European standards)

o IPC-7351 (land pattern and footprint creation)

Design high-quality multi-layer PCBs using Cadence Allegro, Altium Designer, PADS supporting:

o Auto-routing

o Team collaboration

o High-speed/serial signal handling

Optimize designs for DFM, DFT, DFA, with emphasis on cost, reliability, and layer reduction. Perform stack-up selection, impedance control, and use constraint managers effectively. Apply EMI/EMC-compliant layout practices and design techniques. Collaborate with mechanical and hardware teams on thermal, mechanical, and signal considerations. Understand PCB materials, fabrication processes, soldering standards, and assembly techniques. Generate fabrication outputs including Gerbers, ODB++, drill files, BOMs, Pick & Place, and mechanical drawings. Conduct thorough reviews for design quality, manufacturability, and compliance to standards.

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Required Skills

B.Tech in electronics engineering with 5+ years of hands-on PCB layout experience including symbol/footprint creation. Strong understanding of DFM/DFT/DFA, PCB stack-up, HDI, back drilling, and high-volume production optimization. Proficiency with EDA tools: Cadence Allegro, Altium Designer, PADS. Knowledge in EMI/EMC standards and design practices. Familiar with different component manufacturers, packages, specifications, and selection criteria. Strong ability to read datasheets, interpret component specs, and assess mounting/thermal requirements. knowledge of IPC standards: IPC-2221, IPC-7351, IPC-610, etc. Familiar with assembly guidelines, soldering standards, PCB materials, and manufacturing processes. * Experience working under AS9100 quality standards and procedure