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Lead Verification Engineer
THE ROLE:
The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design.
THE PERSON:
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.
KEY RESPONSIBILITIES:
Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified
Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases
Estimate the time required to write the new feature tests and any required changes to the test environment
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
Review functional and code coverage metrics - modify or add tests or constrain random tests to meet the coverage requirements
PREFERRED EXPERIENCE:
Proficient in IP level ASIC verification
Proficient in debugging firmware and RTL code using simulation tools
Proficient in using UVM testbenches and working in Linux and Windows environments
Experienced with Verilog, System Verilog, C, and C++
Graphics pipeline knowledge
Developing UVM based verification frameworks and testbenches, processes and flows
Automating workflows in a distributed compute environment.
Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
Strong background in the C++ language, preferably on Linux with exposure to Windows platform
Good understanding and hands-on experience in the UVM concepts and SystemVerilog language
Good working knowledge of SystemC and TLM with some related experience.
Scripting language experience: Perl, Ruby, Makefile, shell preferred.
Exposure to leadership or mentorship is an asset
Desirable assets with prior exposure to video codec system or other multimedia solutions.
Expertise in Verilog, System Verilog, and Object-Oriented Programming
Experience with UVM or similar Verification Methodology
Requires strong Computer Architecture knowledge
Comfortable in python / perl and editing / maintaining scripts
Experience working in a team environment through the ASIC Project lifecycle from Planning to Tape Out
Experience with DRAM controllers, DDR Phys or DRAM Interface Protocols is a plus.
Strong communication skills and the ability to work independently as well as in a cross-site team environment
Experience: 7+ Years
ACADEMIC CREDENTIALS:
Bachelors or Masters degree in computer engineering/Electrical Engineering
#LI-SR5
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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Job Detail
Job Id
JD3751509
Industry
Not mentioned
Total Positions
1
Job Type:
Full Time
Salary:
Not mentioned
Employment Status
Permanent
Job Location
KA, IN, India
Education
Not mentioned
Experience
Year
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Beware of fraud agents! do not pay money to get a job
MNCJobsIndia.com will not be responsible for any payment made to a third-party. All Terms of Use are applicable.