Mts Silicon Design Engineer ( Ip Verification Lead )

Year    Hyderabad, Telangana, India

Job Description


:WHAT YOU DO AT AMD CHANGES EVERYTHINGWe care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences \xe2\x80\x93 the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world\xe2\x80\x99s most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.AMD together we advance_MTS SILICON DESIGN ENGINEERTHE ROLE:The verification team at AMD is looking for a Member of Technical Staff to lead and contribute on the verification of Network on Chip IPs and Subsystems. The individual will help architect, develop and use simulation and/or formal based verification environments, at block and subystem level, to prove the functional correctness of Network-On-Chip (NOC) IPs, subsystem and SOC designs.THE PERSON:You have a passion for modern, complex digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/timezones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.KEY RESPONSIBILITIES:

  • Lead and Plan verification of complex digital design blocks by fully understanding the architecture and design specifications.
  • Interact with architects and design engineers to create a comprehensive verification testplan.
  • Design and architect testbenches in System Verilog and UVM to complete verification of the design in an efficient manner,
  • Create and enhance constrained-random and/or directed verification environments, and formally verify designs with System Verilog Assertions (SVA) and industry leading formal tools.
  • Debug tests with design engineers to deliver functionally correct design blocks.
  • Identify and write coverage measures for stimulus quality improvements.
  • Perform coverage analysis to identify verification holes and achieve closure on coverage metrics.
PREFERRED EXPERIENCE:
  • Working experience on PCIe, DMA, CXL and/or NVMe protocols required
  • Knowledge of bus protocols like AXI/AHB desired
  • Grounds-up development experience with implementation of UVM/OVM and/or Verilog, System Verilog test benches and/or BFMs is required
  • Strong understanding of simulation tools and knowledge of scripting languages like Perl, tcl or cshell
  • Highly motivated, Self-starter individual with ability to work in a fast-paced team environment
ACADEMIC CREDENTIALS:
  • BS in EE/CE & 10+ years of experience, or an MS in EE/CE & 7+ years of experience in pre-silicon verification
# LI-SR4Benefits offered are described: .AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants\xe2\x80\x99 needs under the respective laws throughout all stages of the recruitment and selection process.

Advanced Micro Devices

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Job Detail

  • Job Id
    JD3274655
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    Hyderabad, Telangana, India
  • Education
    Not mentioned
  • Experience
    Year