Job Description

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Job Information

Department Name


Platforms & Compilers
Job Type


Full time
Date Opened


29/10/2025
Industry


Software Development
Minimum Experience In Years


5
Maximum Experience In Years


8
City


Ramapuram
Province


Tamil Nadu
Country


India
Postal Code


600089
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About Us

MulticoreWare is a global software solutions & products company with its HQ in San Jose, CA, USA. With worldwide offices, it serves its clients and partners in North America, EMEA and APAC regions. Started by a group of researchers, MulticoreWare has grown to serve its clients and partners on HPC & Cloud computing, GPUs, Multicore & Multithread CPUS, DSPs, FPGAs and a variety of AI hardware accelerators.





MulticoreWare was founded by a team of researchers that wanted a better way to program for heterogeneous architectures. With the advent of GPUs and the increasing prevalence of multi-core, multi-architecture platforms, our clients were struggling with the difficulties of using these platforms efficiently.





We started as a boot-strapped services company and have since expanded our portfolio to span products and services related to compilers, machine learning, video codecs, image processing and augmented/virtual reality. Our hardware expertise has also expanded with our team; we now employ experts on HPC and Cloud Computing, GPUs, DSPs, FPGAs, and mobile and embedded platforms. We specialize in accelerating software and algorithms, so if your code targets a multi-core, heterogeneous platform, we can help.





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Job Summary


We are looking for an experienced LLVM Backend Engineer to design and implement backend components of the compiler toolchain. You will be responsible for building and optimizing the code generation flow targeting the custom hardware architecture.


This role involves deep work on LLVM IR transformations, instruction selection, and target-specific optimizations to deliver high-performance and efficient compiled code.

Key ResponsibilitiesDevelop and maintain the LLVM backend for a custom or existing target architecture. Implement and extend instruction selection, register allocation, scheduling, and code emission. Design and implement IR-level optimization passes to improve performance, memory efficiency, and code quality. Work on LLVM middle-end transformations and optimizations. Analyze and tune generated assembly/code quality for performance bottlenecks. Collaborate with hardware teams to ensure architectural features are fully leveraged by the compiler backend. * Contribute to internal LLVM forks or upstream where applicable.