Job Description

7 - 9 Years
1 Opening
Bangalore

Role description

Role Proficiency:



Works independently to manage Delivery/Stakeholders and enable KPI's. Manage test cases from requirements to execution. Identify the test case requirements and write the same



Outcomes:



Manage customers to ensure no escalations

Coordinates with the team effectively

Conducts technical interview for the project requirements

Contribute to test case writing for the product

Validate the accuracy of the test cases written for the product

Conducts validation and root cause analysis

Isolate/ packetize the failures to correct component

Attend customer meeting and communicate effectively on the requirements and results.

Locate the product failures and report it in test repository and bug tracker

Learn technology business domain system domain individually and as recommended by the project/account

Complete the certifications for the role (e.g. ISTQB UST GAMMA certifications)

Evaluate the effectiveness of test cases planned

Perform escape analysis for the product

Perform KPI enablement


Measures of Outcomes:



Ensure the product/ validation within defined SLA

Understand the project requirements and hire the right candidate

Good analytical skills and the ability to perform defect triaging

Adherence to schedule and timelines

SLA turnaround of production bugs

Define productivity standards for project

Completion of all mandatory training requirements


Outputs Expected:



Manage Project:



Manage task deliverables with quality and targeting completion timeframe.

Able to support test manager in timely deliverables and test planning



Estimate:



Estimate time
effort

and resource dependence for one's own work and for others' work.




Document:



Create component level / product behaviour documents Create test reporting templates
BKMs and knowledge sharing documents for team




Status Reporting:



Report status of tasks assigned

Compliance to validation standards and process



Mentoring:



Mentor junior leads and POCs in the program Host classroom training sessions for the junior validation engineers


Skill Examples:



Good presentation skills and diplomacy

Should possess good bug advocacy skills

Should have automation scripting skills

Able to perform severity and priority identification of sightings raised

Ability to estimate effort time required for own work and for the junior engineers

Ability to perform and evaluate test in the customer or target environment

Work in a team environment

Good written and verbal communication abilities


Knowledge Examples:


Able to understand the product lifecycle and deadline requirements
+ Should possess excellent domain knowledge

+ Good CPU/ GPU architecture knowledge

+ Possess very good knowledge of the product

Additional Comments:

Client Job Title: SOC Design Verification Engineer UST Job Title: Lead II - Semiconductor Product Validation Who we are: At UST, we help the world's best organizations grow and succeed through transformation. Bringing together the right talent, tools, and ideas, we work with our client to co-create lasting change. Together, with over 30,000 employees in over 25 countries, we build for boundless impact--touching billions of lives in the process. Visit us at UST.com. The Opportunity: UST is looking for 06 SOC Design Verification Engineer. Key Roles & Responsibilities: We are seeking a highly motivated and experienced SoC Verification Engineer to join our team. As a key member of the verification team, you will be responsible for developing and executing verification plans for complex System-on-Chip (SoC) designs. You will work closely with design and architecture teams to ensure the quality and reliability of our products. o Perform functional and performance verification of SoC designs using simulation, emulation, and formal verification techniques. Develop and execute comprehensive tests for functional verification and performance verification at the core and SOC level. o Create and maintain verification environments using industry-standard tools and methodologies (e.g., UVM). o Develop test benches, test cases, and coverage models using UVM, SystemVerilog, and C++. o Debug and analyze simulation results to identify and resolve design issues. o Collaborate with design and architecture teams to understand design specifications and identify potential verification challenges. o Document verification results and track progress. o Participate in code reviews and contribute to the improvement of verification methodologies. Desired Skills: o o Strong understanding of digital design principles and SoC architecture. o Proficiency in hardware description languages (e.g., SystemVerilog, Verilog, VHDL). o Proficiency in scripting languages (Python) and C/C++ o Experience with verification methodologies (e.g., UVM, OVM, VMM). o Experience with simulation tools (e.g., Synopsys VCS, Cadence Xcelium, ). o Experience with debugging and analyzing simulation results. o Strong problem-solving and analytical skills. o Excellent communication and teamwork skills. o Prior experience to industry standard protocols such as AXI, AHB, PCIe, DDR etc. will be an advantage Qualification: o o Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field. o 8-12 years of experience in SoC verification. o Proficient in Python, C, C++ scripting language. o Experience with soc level functional and performance verification. o Familiarity with formal verification techniques is a plus. What we believe: We're proud to embrace the same values that have shaped UST since the beginning. Since day one, we've been building enduring relationships and a culture of integrity. And today, it's those same values that are inspiring us to encourage innovation from everyone to champion diversity and inclusion and to place people at the centre of everything we do. Humility: We will listen, learn, be empathetic and help selflessly in our interactions with everyone. Humanity: Through business, we will better the lives of those less fortunate than ourselves. Integrity: We honour our commitments and act with responsibility in all our relationships. Equal Employment Opportunity Statement UST is an Equal Opportunity Employer. We believe that no one should be discriminated against because of their differences, such as age, disability, ethnicity, gender, gender identity and expression, religion, or sexual orientation. All employment decisions shall be made without regard to age, race, creed, colour, religion, sex, national origin, ancestry, disability status, veteran status, sexual orientation, gender identity or expression, genetic information, marital status, citizenship status or any other basis as protected by federal, state, or local law. UST reserves the right to periodically redefine your roles and responsibilities based on the requirements of the organization and/or your performance. o To support and promote the values of UST. o Comply with all Company policies and procedures

Skills

System Verilog,Simulation,Validation,Python

About UST

UST is a global digital transformation solutions provider. For more than 20 years, UST has worked side by side with the world's best companies to make a real impact through transformation. Powered by technology, inspired by people and led by purpose, UST partners with their clients from design to operation. With deep domain expertise and a future-proof philosophy, UST embeds innovation and agility into their clients' organizations. With over 30,000 employees in 30 countries, UST builds for boundless impact--touching billions of lives in the process.