B.E degree with Electrical/Electronic as major subjects, with 7 to 10 years of work experience
Experience in complete hardware design life cycle
experince in schematic and bom generatin
layout co-ordination
test plan creation and test execution
Clarity on signal quality parameters (e.g., eye diagram, jitter, frequency ppm, duty cycle, etc.) and how to measure those parameters.
Familiarity of working in lab environment and have strong knowledge of using different equipment like DSO, Multimeter, Power supplies. (e.g., idea about ESD,
minimum oscilloscope/probe BW required for measurement, etc.)
Knowledge to understand board design from schematics (.pdf file) and layout (*.brd file - using Cadence Allegro tool) (e.g., should be able to understand
signal/power topology from schematics, should be able to locate test points in PCB for signal of interest, etc.)
Knowledge to assemble a x86 motherboard (e.g., connect SMPS, DRAM cards, PCIe AIC, display, other peripherals, etc. to x86 motherboard)
Knowledge of board/chip bring-up flow (e.g., idea on list of items to verify before/after attaching chip to board like verifying No-Stuff components, impedance of
voltage rails, etc.)
Proficiency in Windows & Linux OS and in Microsoft Office tools (e.g., In Linux - navigate folders, edit text files, move/copy files, SSH, execute scripts, etc.)
Familiarity with scripting languages like Python/Perl (e.g., idea about installing different python modules, execute python scripts, etc.)
Be an effective team player (e.g., volunteer to take up work, own up the task and approach folks to get things done, etc.)
Communicate observation/requirement in a crisp and straightforward way.
Desirable -
Knowledge and hands-on experience on high speed SERDES IO (like PCIe, USB3, UFS, Ethernet, etc.) validation (e.g., eye measurement, JTOL testing, etc.).
Knowledge and hands-on experience of using equipment like BERT (Bit Error Ratio Tester), PCIe/USB3/UFS Logic Analyzer, etc.
Knowledge and hands-on experience on Silicon PVT characterization.
Job Requirement
Hardware Design & Component Engineering
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Job Detail
Job Id
JD3751049
Industry
Not mentioned
Total Positions
1
Job Type:
Contract
Salary:
Not mentioned
Employment Status
Permanent
Job Location
TN, IN, India
Education
Not mentioned
Experience
Year
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