Job Description

Details of the requirement are given below for your reference:

1) Client Company : Software company
2) Position :

FPGA Developer

3) Experience Required : 2+ years
4) Salary Negotiable : Salary - Rs. 60000 PM to 1,00,0000 PM Depending upon candidates knowledge
5) Job Location : Ahmedabad
6) :

Education:

B.E./B.Tech/M.S. in Electronics, Electrical, or Computer Engineering (or equivalent practical experience).

Key Responsibilities:

Architect, implement, and optimize RTL (Verilog/SystemVerilog) for:

PWM/SVPWM, commutation, current/speed/position loops, over-current/over-voltage protections.
Sensor interfaces: quadrature encoders, Hall sensors, SPI/IC ADCs, resolver/angle sensors.
Develop and integrate communication controllers: SPI, IC, UART, RS-485/Modbus, CAN/CAN-FD, and (nice-to-have) Ethernet/EtherCAT/AXI4-Stream.
Create testbenches, run simulations (ModelSim/Questa/Vivado Simulator), and perform functional & timing verification.
Achieve timing closure (constraints, CDC handling, STA), perform resource/power optimization, and support board bring-up with lab instruments.
Collaborate with firmware teams to define register maps, driver interfaces, and communication protocols to/from MCUs/SoCs.
Produce clear documentation (design specs, ICDs, verification reports) and contribute to code reviews/CI.
Must-Have Qualifications:

2+ years hands-on FPGA development with Verilog/SystemVerilog or VHDL.
Proven experience in motor control (BLDC/PMSM/stepper) and sensor interfacing on FPGAs.
Strong grasp of digital design fundamentals, finite state machines, fixed-point/DSP basics, buffering, and CRC/checksums.
Proficiency with at least one major toolchain: Xilinx Vivado or Intel Quartus (IP integrator, constraints, timing).
Experience with hardware debug & validation: oscilloscopes, logic analyzers, protocol analyzers.
Familiarity with Git/SVN, issue tracking, and writing maintainable, well-documented code.
Added Advantage (Preferred):

Processor/SoC communication experience over SPI/IC/UART/CAN/Ethernet, memory-mapped buses (AXI/AHB/APB), or soft cores (MicroBlaze/Nios II).
Integration with embedded C/C++ drivers, RTOS, or Linux userspace for FPGA peripherals.
Experience with EtherCAT, Profinet, or custom high-speed serial links (LVDS/SerDes).
Knowledge of model-based design (MATLAB/Simulink), HLS, or advanced verification (UVM).
Power-stage awareness (gate drivers, current sensing, dead-time, EMI/EMC considerations).

With Regards,

Gopi (HR)

7777981967 - gopi.ssindustries04@gmail.com

Job Type: Permanent

Pay: ?60,000.00 - ?100,000.00 per month

Work Location: In person