Fpga Design And Verification Technical Lead /senior Technical Lead

Year    KA, IN, India

Job Description

Location: Bangalore, India
In fast changing markets, customers worldwide rely on Thales. Thales is a business where brilliant people from all over the world come together to share ideas and inspire each other. In aerospace, transportation, defence, security and space, our architects design innovative solutions that make our tomorrow's possible.
Present in India since 1953, Thales is headquartered in Noida, Uttar Pradesh, and has operational offices and sites spread across Bengaluru, Delhi, Gurugram, Hyderabad, Mumbai, Pune among others. Over 1800 employees are working with Thales and its joint ventures in India. Since the beginning, Thales has been playing an essential role in India's growth story by sharing its technologies and expertise in Defence, Transport, Aerospace and Digital Identity and Security markets.

FPGA Design and Verification - Technical Lead /Senior Technical Lead



Key Responsibilities and Tasks




As a Senior Technical Lead FPGA Design and Verification, you will be a major actor in the FPGA development and Verification

Developing FPGA design requirements, architecture development. RTL development using VHDL, test through developer test benches in simulation environment. Develop timing constraints, conduct timing analysis and timing closure Optimize designs to meet performance requirements. Implementation on target FPGA Integration of FPGA in board level, debug, solve integration issues and physical verification. Understand and develop required DO-254 process documents and participate in SOI audits. Mentor, drive and guide team members to achieve project objectives Creation of detailed work brake down for planed execution, identify risk and dependency

Skills Required



Mandatory Skills:



Electronics/ Electrical Engineering with 10+ years of experience on FPGA designs, design optimizations, design integration on hardware, test and problem solving Strong understanding and design knowledge of digital logic, analysis and debug skill Hands-on experience in RTL development for FPGA using VHDL/Verilog. Proficiency with timing analysis and timing closures for FPGA. Proficiency for developing timing constraints and solving CDC issues Proficiency in FPGA design tools like Vivado, Quartus and Libero. DO-254 development process Different bus protocols like I2C, SPI, QSPI, UART, AXI, DDR3/4, PCIe, JTAG IP integration and test on FPGA platforms FPGA verification, developing test case and test benches, debug and simulation Strong analytical and problem solving skills.

Good to have



Knowledge of Hardware, Board and different components like ADC, DAC, Serial Memory, Display Interface Usage of Lab Equipment like DSO, Logic Analyzer TCL scripting

Educational Qualification



Bachelor or Masters in Electronics & Communication or equivalent



Values and Behaviors



High level of autonomy and efficiency. Good organizational abilities and good interpersonal skills Self-motivated, ability to work independently with minimal direction. Ability to work in multi-geography and multi-disciplinary team.

We also attach great importance to Soft skills, adaptability, openness and continuous improvement. Your autonomy and your taste for teamwork, your rigor and curiosity are all qualities that we value every day.

Language




Ability communicates in English verbally and through written form.


At Thales we provide CAREERS and not only jobs. With Thales employing 80,000 employees in 68 countries our mobility policy enables thousands of employees each year to develop their careers at home and abroad, in their existing areas of expertise or by branching out into new fields. Together we believe that embracing flexibility is a smarter way of working. Great journeys start here, apply now!

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Job Detail

  • Job Id
    JD3905127
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    KA, IN, India
  • Education
    Not mentioned
  • Experience
    Year