About Analog Devices
Analog Devices, Inc. (NASDAQ: ADI ) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With revenue of more than $9 billion in FY24 and approximately 24,000 people globally, ADI ensures today's innovators stay Ahead of What's Possible(TM). Learn more at www.analog.com and on LinkedIn and Twitter (X).
Sr Engineer, Digital Design
Design key digital blocks such as clocks, reset paths, memory controller, NVMs etc. in Verilog/ System Verilog with built-in configurability to allow Power/ Performance/ Area tradeoffs
Develop strong understanding of ARM processor cores & subsystems (M series associated infrastructure such as caches, interconnect fabric, DMA, MMU, Coresight Debug & Trace, TZC) and their integration requirements
Design for Test skills on SCAN, MBIST boundary scan, JTAG and ARM DAP interface and general functional DFT understanding.
Experience of AFE based projects is an add on.
Package Digital IP for seamless integration into design flow at different stages - RTL/ constraints/ CDC waivers, timing wavers, DFT DRCs and waivers, software programming sequence etc.
Consolidate & curate digital IP for SPI/ I2C/ UART/ JTAG and other slow serial interfaces & peripherals
ATPG vectors, MBIST and BSCAN post silicon debug support.
Develop User Guides for RTL Integration, Synthesis, DFT, PnR, Programming Sequence, characterization etc.
Minimum QualificationsMinimum B.E. / B.Tech degree in Electrical/Electronics/Computer science
4 - 8 years of digital logic design and hands-on RTL coding experience using Verilog and SystemVerilog
Strong understanding of control path and data-path digital design concepts with an eye for realizing correct by construction solutions
Experience with specifying Design Verification (DV) requirements such as test plans, coverage metrics, and evaluate DV quality so as to realize robust design quality
Knowledge of Lint, CDC, formal equivalence, DFT concepts, power analysis
Experience with developing timing constraints and ability to carry out logic synthesis and Static timing analysis
Good interpersonal, teamwork and communication skills to logically & effectively drive discussions with teams spread geographically
Understanding of standard on-chip interfaces such as APB/AHB/AXI/ Stream protocols is a strong plus
Knowledge of Processor/SoC architecture and/or DSP fundamentals is a strong plus
Experience with end-to-end ASIC/ SoC product development & productization is very desirable
Experience in IP integration (memories, IO's, embedded processors, hard macros, Analog IP)
Knowledge of Microelectronics concepts
Scripting skills in Python, Tcl, C etc
Ability to collaborate and work directly with the tool vendors to resolve tools bugs, as well as implement the required improvements
Great communication and teamwork skills
For positions requiring access to technical data, Analog Devices, Inc. may have to obtain export licensing approval from the U.S. Department of Commerce - Bureau of Industry and Security and/or the U.S. Department of State - Directorate of Defense Trade Controls. As such, applicants for this position - except US Citizens, US Permanent Residents, and protected individuals as defined by 8 U.S.C. 1324b(a)(3) - may have to go through an export licensing review process.Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.
Job Req Type: Experienced
Required Travel: Yes, 10% of the time
Shift Type: 1st Shift/Days
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