What You'll DoDesign and implement DFT architecture with focus on MBIST.Integrate MBIST IPs, handle test insertion, simulation, and ATPG.Debug MBIST/ATPG issues during silicon bring-up.Collaborate with RTL, Physical Design, and Verification teams across the design cycle.Support post-silicon bring-up and yield improvement activities.Ensure high test coverage and robust quality in scan and MBIST.What We're Looking For? B.E./M.E. in Electronics or related field. ? 10+ years of hands-on DFT experience (MBIST, ATPG, Scan, Boundary Scan, JTAG). ? Proficiency with Synopsys DFT Compiler, Tessent, or similar tools. ? Experience with memory test algorithms, repair analysis, and pattern generation. ? Strong scripting skills (TCL, Perl, Python). ? Excellent problem-solving ability and independence.
Job Types: Full-time, Permanent
Pay: ₹2,061,062.20 - ₹4,000,000.00 per year
Work Location: In person
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