Design Verification Lead

Year    TS, IN, India

Job Description

Mandatory Skill Set (As Discussed):

7+YOE Leads with very strong SOC - C, SV, UVM based knowledge

Should have worked ARM Protocols

Should have Debugging skills.

Education Required:

Btech- EEE/ Mtech - VLSI Stream

:



7+YOE Leads with very strong SOC - C, SV, UVM based knowledge.

Strong Hands-on & also lead a team of 4-5 engineers for the work package closure

In-depth knowledge of ARM Architecture; AMBA, AXI bus knowledge

Debugging using waveform, Logs, TARMAC

Job Type: Full-time

Pay: ₹2,000,000.00 - ₹3,000,000.00 per year

Benefits:

Paid time off Provident Fund
Experience:

DV Lead : 7 years (Required) Debugging skills.: 7 years (Required) ARM Protocols: 7 years (Required)
Work Location: In person

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Job Detail

  • Job Id
    JD5008910
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    TS, IN, India
  • Education
    Not mentioned
  • Experience
    Year