Design Verification Engineer

Year    KA, IN, India

Job Description

Job Title:

Design Verification Engineer

Location:

Bengaluru

Experience:

2 to 5 years

Job Overview:


We are seeking a skilled and motivated Design Verification Engineer to join our team. The candidate will be responsible for verifying complex digital designs using advanced verification methodologies, ensuring functionality, quality, and reliability of our products.

Key Responsibilities:



Develop and implement test plans, testbenches, and verification environments. Work with RTL design engineers to understand design specifications. Perform functional verification using SystemVerilog/UVM. Create and run directed and random tests for coverage closure. Debug simulation failures and track design issues to closure. Collaborate with cross-functional teams to ensure verification quality and project timelines. Maintain and improve verification flows and methodologies.

Required Skills & Qualifications:



Bachelor's/Master's degree in Electronics, Electrical, or Computer Engineering. Strong experience in

SystemVerilog and UVM methodologies

. Hands-on experience in

functional verification and coverage-driven verification

. Knowledge of

protocols such as PCIe, USB, Ethernet, DDR, etc.

is preferred. Strong debugging and problem-solving skills. Familiarity with EDA tools (Synopsys, Cadence, Mentor Graphics). Good communication and teamwork skills.

Preferred:



Experience in RAL, assertions (SVA), and formal verification. Exposure to low-power design verification.
Job Types: Full-time, Permanent

Work Location: In person

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Job Detail

  • Job Id
    JD4081992
  • Industry
    Not mentioned
  • Total Positions
    1
  • Job Type:
    Full Time
  • Salary:
    Not mentioned
  • Employment Status
    Permanent
  • Job Location
    KA, IN, India
  • Education
    Not mentioned
  • Experience
    Year