Job Description

Mentor and coach junior physical design engineers, providing technical guidance and support

throughout the design process.

? Review and provide feedback on floorplans, placement, and routing strategies to ensure optimal

design quality and performance.

? Guide the team in achieving timing closure targets through effective timing analysis and

optimization techniques.

? Collaborate with cross-functional teams including RTL design, verification, and backend

implementation to address design challenges and meet project goals.

Develop and maintain best practices, methodologies, and guidelines for physical design

implementation.

? Stay current with industry trends and advancements in physical design methodologies and tools.

? Contribute to the continuous improvement of the physical design flow, identifying areas for

optimization and efficiency gains.

Qualifications:

? Bachelor's/Master's degree in Electrical Engineering, Computer Engineering, or related field.

? Extensive experience in physical design implementation for complex ASIC designs.

? Proficiency in EDA tools such as Cadence Innovus, Synopsys ICC2, or similar tools.

? Strong understanding of deep sub-micron process technologies and associated physical design

challenges.

? Excellent problem-solving skills and the ability to troubleshoot complex design issues.

? Effective communication and leadership abilities, with a track record of mentoring junior

engineers.

? Proven ability to work collaboratively in a fast-paced, dynamic environment.

Job Type: Full-time

Pay: ₹862.91 - ?1,362.74 per day

Work Location: In person