Nokia Bell Labs Core Research: Platforms & ASIC Research Team is seeking a talented and detail-oriented Backend Design Engineer to join our IC (Integrated circuit) development team. The role involves key aspects of Circuit Design/simulation of analog components (PLL & power management circuits etc.) and IP characterization of Digital Hard IPs. You will lead the design/development & characterization using your experience with industry-standard tools, and a passion for delivering high-quality semiconductor solutions.
The mission in Bell Labs Core Research is to invent game changing innovations at the edge of science in and across all network segments that define the future of communication, ensure portfolio leadership of Nokia's business groups and create broader value in adjacent opportunities. The Platform and ASIC Research Lab teams focuses on access technologies, generate innovations and accelerate commercial adoption through implementation, experimentation, trials and technical demonstrations.
Design and implement high-performance circuits for frequency synthesis and clock generation.
You will also work as an Engineer for Liberate, you will engineer innovative and quality characterization solutions/methods for foundational IPs, working closely with R&D and fellow engineers.
Characterize parametric performance of High-Speed IO PHYs (SERDES), PLLs and other Custom/Foundational Hard-IPs.
Work on different Liberty formats: NLDM, CCS, ECSM, LVF, EM, Aging etc.
Contribute to industry-standard circuit simulators & perform characterization.
Collaborate with design, verification, and research teams across the globe to resolve design challenges and improve performance.
Work closely with foundry teams to address process technology issues and implement best practices
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