Job Description

In today’s world of faster and more virtualized servers, storage, and network connections, CPUs cannot keep up with the growing network processing demands. Legacy or foundational network interface cards (NICs) may deliver efficient networking however when running demanding workloads, they cause overhead that burdens CPUs, chewing into available processing power. To deploy more advanced networking capabilities a new generation of intelligent NICs are required to deliver accelerations and additional processing power to offload CPUs. The industry-leading NVIDIA SmartNICs provide sophisticated hardware offloads and accelerated networking, storage, security, and manageability services for modern cloud, artificial intelligence, telecommunications and traditional enterprise workloads.
NVIDIA’s Networking business unit (NBU) works on SmartNICs which help accelerate network performance while reducing the CPU overhead of Internet Protocol (IP) packet transport, freeing more processor cycles to run applications. These SmartNICs also embed innovative hardware engines that offload and accelerate security with in-line encryption/decryption. With unmatched RDMA over Converged Ethernet (RoCE) performance, NVIDIA SmartNICs deliver efficient, high-performance remote direct-memory access (RDMA) services to bandwidth- and latency-sensitive applications. The NBU team in India is a new team which is growing at a fast pace. We are currently seeking an Experienced Verification Engineer with strong verification fundamentals to work in NBU ASIC team. You will join a group of hardworking engineers to implement the next innovative Networking Silicon chip. In this position, you'll make a real impact in a multifaceted, technology-focused company while developing the industry's best high-speed communication devices, delivering the highest throughput and lowest latency! As a Verification Engineer at NVIDIA, verify the design and implementation of the industry's leading SmartNICs, be responsible for verification of the design, architecture and micro-architecture with opportunities for pre-silicon, emulation, and post-silicon activities. You will be working with architects, designers, pre and post silicon verification teams to accomplish your tasks.
What you'll be doing:

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  Be responsible for verifying the smartNIC designs, architecture and micro-architecture using advanced verification methodologies.
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  You are encouraged to understand the design and implementation, define the verification scope, develop the verification infrastructure and verify the correctness of the design.
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  Come up with test plans, tests and verification infrastructure for complex IPs/sub-systems.
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  Use advanced verification methodologies like e-specman, SV-UVM etc.

What we need to see:

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  BS (or equivalent experience) / MS with 2+ years of experience in design verification.
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  Exposure to design and verification tools (Verilog/SV or equivalent, Cadence or equivalent simulation tools, debug tools like Indago, GDB etc.).
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  C/C++ programming/scripting language experience desirable.

Ways to stand out from the crowd:

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  Prior experience of smartNIC and/or high-speed interconnects.
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  Strong debugging, problem-solving and analytical skills.
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  Scripting knowledge (Python/Perl/shell).
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  Good interpersonal skills and ability & desire to work as a phenomenal teammate.

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.